The present invention relates to a method and apparatus for preparing patterns, and more particularly, it relates to a method and apparatus for preparing layout data of process patterns formed in a scribe area of a photomask.
In a manufacturing process of a semiconductor device such as an LSI, a wafer substrate is repeatedly applied to transferring, development and etching of circuit patterns utilizing photolithography, and thus a great number of semiconductor chips are formed on the wafer substrate.
In the transferring of the circuit patterns, an exposure device (stepper device) is used to repeatedly perform reduced projection of the patterns formed in the photomask to the wafer substrate. Then, scribe areas are defined between the semiconductor chips on the wafer substrate, and the wafer substrate is diced along the scribe areas, thereby making it possible to obtain individual semiconductor chips.
Various kinds of process patterns and monitor circuits are formed in the scribe areas of the wafer substrate, in the manufacturing process of the LSI. The process patterns include an alignment pattern, a displacement check pattern and a monitor pattern. The alignment pattern is used to align the photomask and the wafer substrate. The displacement check pattern is used to measure transferring results. The monitor pattern is used to check the state of chips in every process such as the etching and chemical mechanical polishing (CMP).
The stepper devices of a plurality of manufacturers are used in production lines of the semiconductor device, for such a purpose as stable operation. In this case, the process patterns differ depending upon each stepper device. Therefore, it is preferable that one photomask is shared by a plurality of stepper devices in reducing the producing costs and shortening the producing time of the photomask. In this case, a photomask having plural kinds of process patterns is needed.
The monitor circuit is used to check the operation of various function elements in a chip by electrically monitoring the circuits in the chip after a wafer process is finished. The operation of the circuits in the chip is preferably checked by a test, however, if a test pattern thereof is formed in the chip, not only the circuit becomes complicated, but also the testing cost is increased. Therefore, the operation of the circuits in the chip is analogized by forming a simple circuit for the circuits in the chip within the monitor circuit and performing an operational test of the circuit. Consequently, it is necessary to form plural kinds of monitor circuits in the scribe area, to ensure that the operation of the circuits in the chip is monitored.
In this way, various process patterns and monitor circuits are formed in the scribe area on the wafer substrate. Therefore, in preparing the photomask, it is necessary to take the positions of arranging the monitor circuits into account so that the process patterns and the monitor circuits will not be arranged in a way to overlap each other in the scribe area when layout data (also referred to as frame data) of the process patterns for manufacturing the LSI is produced.
Conventionally, the photomask is manufactured in accordance with the chip size of a main device and the number of layouts of the main device. At this point, marks (alignment mark, displacement check mark and monitor mark) indicating the process patterns of each kind are arranged in the scribe areas of the photomask.
The process patterns are used for the alignment, checking, measurement and the like in various processes such as a wafer process, testing process and assembly process (mainly dicing). Therefore, arrangement conditions of each mark are set in accordance with uses in each process. Further, various arrangement models are prepared considering the arrangement conditions and the number of layouts on the photomask, and the process patterns are selected and arranged on the basis of the arrangement models.
FIG. 1 is a flowchart showing the process of preparing the layout data of the process patterns in accordance with a conventional pattern preparing apparatus.
First, a plurality of arrangement models are prepared, in which the arrangement positions of the process patterns are patterned on the basis of the arrangement conditions and the number of layouts on the photomask that are previously assumed (step S100). Then, arrangement model libraries 100 collecting a plurality of arrangement models are prepared. The arrangement model libraries 100 are stored in a storage device of the pattern preparing apparatus. Normally, the process of preparing arrangement models (step S100) is mainly performed when the layout data is prepared in accordance with a new design rule as opposed to a design rule of the manufacturing process.
The pattern preparing apparatus receives processing conditions necessary to arrange the process patterns (step S101). The processing conditions include the chip size, the number of layouts of chips and the arrangement conditions of the process patterns, for example.
Next, the pattern preparing apparatus selects an arrangement model for the process pattern in accordance with the processing conditions from the arrangement model libraries 100 (step S102).
The pattern preparing apparatus determines whether an arrangement model suitable for the processing conditions exists in the arrangement models registered in the arrangement model libraries 100 (step S103). If an arrangement model suitable for the processing conditions exists, the pattern preparing apparatus calculates a coordinate value indicating the arrangement position of the process pattern in the scribe area using the selected arrangement model (step S104), and prepares the layout data of the process pattern in accordance with the coordinate value (step S105).
If an arrangement model suitable for the processing conditions does not exist, the pattern preparing apparatus extracts an arrangement model similar to the suitable arrangement model (similar model) from the arrangement model libraries 100 (step S106). The pattern preparing apparatus prepares layout data on the basis of the similar model, and checks the layout data (step S107). After checking, the pattern preparing apparatus corrects the layout data as needed (step S108).
Meanwhile, a plurality of arrangement models registered in the arrangement model libraries 100 is prepared by an operator by hand assuming various processing conditions (chip size, the number of layouts, and arrangement conditions of the process patterns) at the time of preparing the layout data. As a consequence, a considerable amount of time has been required to prepare many arrangement models available at the time of preparing the layout data.
Especially, notable progress is made in a recent process technology, and the number of process patterns arranged in the scribe area is increasing drastically. Consequently, it is extremely difficult to prepare all arrangement models suitable for the processing conditions of preparing the layout data. Therefore, in the case of preparing layout data that fulfills the processing conditions for which arrangement models are not prepared, it is difficult to arrange the process patterns while effectively utilizing the scribe area.
As the number of monitor circuits arranged in the scribe area is also increasing drastically, it has been extremely difficult to arrange the process patterns while preventing the process patterns from overlapping the monitor circuits. For this reason, automatic arrangement by the pattern preparing apparatus utilizing the arrangement models is not successful in some cases. In this case, the operator needs to correct the arrangement of the process patterns by hand, which, as a result, has increased the time to prepare the layout data. When the arrangement of the process patterns is corrected by hand in such a manner, it is very likely to cause mistakes such as the overlapping of patterns, so that many processes may be performed to eliminate the overlapping. As a result, the patterns can not be properly arranged in some cases.